Power MUX Applications Overview

GreenPAK Blog
10 min readApr 19, 2024

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This project explains the application solution of manual switching between two power sources using the SLG59H1405V device.

Story

Many applications require two or more power sources and there can be issues when switching between them. For example, almost all portable electronic devices have integrated rechargeable batterie and USB port to charge it. As a result, a solution for seamlessly transitioning between the internal battery and external power sources is required. Connecting multiple power supplies to a single input without any protection may result in power failures, short circuits, and loss of power. In such cases, Power Multiplexer (Power MUX) devices are commonly used as a reliable solution. This article explains the application solution of manual switching between two power sources using the SLG59H1405V device. For more details about load switches follow the link.

Power MUX General Concept

Power multiplexors or PowerMux are devices that provide a seamless transition between two or more power inputs. They are typically used in applications like computers, digital cameras, modems, cellphones, etc. It may also be used in battery management systems and peripheral power interface systems.

In general, the PowerMux device switches between 2 input power supplies to 1 common output supply rail and thus provides a continuous supply for the overall device. A simplified block diagram of PowerMUX is illustrated in Figure 1.

Figure 1: Power Mux simplified block diagram

From a technical standpoint, PowerMUX is typically implemented by controlling MOSFETs RDSON resistance because MOSFETs have high off isolation, which is important to prevent back-feeding power between two inputs.

From a controlling standpoint, the output power rail can be chosen manually.

A manual PowerMUX is one in which each path is individually controlled by an external signal (logic or microcontroller). An example of Manual PowerMUX with two enable inputs is shown in Figure 2. Such a method is generally used when there is a microcontroller that can decide under what conditions to enable each input. Renesas SLG59H1405V device can be easily used in PowerMux applications, and its detailed operation is described below.

Figure 2: Manual Power Mux

SLG59H1405 Resume

The SLG59H1405V comes with one 5 V, 3 A and one 12 V, 1.25 A rated load switch with common output. The part allows manual selection and seamless transition between available inputs as well as to provide different kinds of protection features. The part is designed for typical 5V/12V manual switchover Power MUX applications, that are well suited for many systems, that have multiple power sources. The SLG59H1405V pin configurations is shown in Figure 3.

Figure 3: Pin Configuration for SLG59H1405V

The following list provides more details on the functions of each pin:

· GND pin: Is a Ground connection. Connect this pin to the system’s analog or power ground plane.

· VIN1 pins: Input terminal of 5.5 V rated Channel 1.

· VIN2 pins: Input terminal of 13.2 V rated Channel 2.

· VBUS pins: Output terminal of the SLG59H1405V Power MUX.

· FLAG pin: An open-drain output, FLAG is asserted LOW when a VIN[1, 2] overvoltage, undervoltage, current-limit, or an over-temperature condition is detected. Connect a 100 kΩ external resistor from the FLAG pin to a local system logic supply. Connect to GND if not use.

· NC pins: No Connect.

· EN1 pin: EN1 turns on Channel 1 and is a low logic-level CMOS input with EN1_VIL < 0.5 V and EN1_VIH > 1.5 V. While there is an internal pull-down circuit to GND (~1 MΩ), connect this pin directly to a general-purpose output (GPO) of a microcontroller, an application processor, or a system controller.

· EN2 pin: EN2 turns on Channel 2 and is a low logic-level CMOS input with EN2_VIL< 0.5 V and EN2_VIH > 1.5 V. While there is an internal pull-down circuit to GND (~1 MΩ), connect this pin directly to a general-purpose output (GPO) of a microcontroller, an application processor, or a system controller.

· ILIM1 pin: A 1%-tolerance, metal-film resistor sets the active current limit for Channel 1. A 20 kΩ resistor sets the active current limit to 4.01 A.

· ILIM2 pin: A 1%-tolerance, metal-film resistor sets the active current limit for Channel 2. A 20 kΩ resistor sets the active current limit to 1.94 A

Using SLG59H1405V in PowerMUX Applications

For using SLG59H1405V in manual power rail selection applications, an external voltage VEN[1, 2] > EN[1, 2] VIH should be applied to the EN[1, 2] pins. Typically, EN1 and EN2 pins are connected to the MCU or other logic level source.

To turn on one of two Channels both VIN1 and VIN2 voltages should be within the operating voltage range (VIN[1, 2] > VIN[1, 2]_UVLO and VIN[1, 2] < VIN[1, 2]_OVP), otherwise the part will be latched-off and EN1 and EN2 signals will be ignored. When a logic high (VEN[1, 2]> EN[1, 2]_VIH) is applied to the EN[1, 2] pin, the Channel 1 or Channel 2 will be on output respectively.

Please note that to turn on Channel 2 in SLG59H1405V, EN2 > EN2_VIH can be applied not sooner than 100 ms after EN1 > EN1_VIH, otherwise, the EN2 signal will be ignored and the switchover to Channel 2 will not be possible until EN1 < EN1_VIL and then EN1 > EN1_VIH again. In conclusion, to turn on Channel 2, Channel 1 should always be turned on first.

The FLAG pin can be pulled high with a resistor to provide feedback on the status of the system. FLAG is asserted LOW when a VIN[1, 2] overvoltage, undervoltage, current-limit, or over-temperature condition is detected. Connect to GND if not used.

The following application scope-shots below demonstrate the turn-on, turn-off and switchover behavior of the SLG59H1405V device for VIN1 = 5 V, VIN2 = 12 V. Current limit is set to 4 A for Channel 1 and 1.9 A for Channel 2. A typical connection diagram for these conditions is illustrated in Figure 4.

Figure 4: Connection diagram of using SLG59H1405V in PowerMUX applications for VIN1 = 5 V, VIN2 = 12 V

SLG59H1405 Protections

The Renesas SLG59H1405 load switch has many protections:

· Over Voltage Protections (OVP)

· Under-Voltage Lockout (UVLO)

· Over Current Protections (OCP)

· Short Circuit Protections (SCP)

· Over-temperature Protection (OTP)

Once one of these protections (except UVLO) has triggered, the SLG59H1405 goes Latch-Off. To release the part from the latch-off condition, both EN1 and EN2 should be set lower than EN[1, 2]_VIL.

Over Voltage Protection

Тhe Over Voltage Protection is always monitoring the input voltage regardless of the active channel. Once VIN1 > VIN1_OVP or VIN2 > VIN2_OVPan SLG59H1405V will latch-off within TOVP response time.

The following application scope-shots below demonstrate the OVP Latch-Off behavior and then proper recovery from Latch-Off of the SLG59H1405V device for VIN1 = 5 V step up to 6 V, VIN2 = 12 V. Figure 9 and Figure 10 are illustrated when Channel 1 is active, and when Channel 2 is active are shown in Figure 11. A typical connection diagram for these conditions is illustrated in Figure 4.

The following application scope-shots below demonstrate the OVP Latch-Off behavior and then proper recovery from Latch-Off of the SLG59H1405V device for VIN1 = 5 V, VIN2 = 12 V step up to 15 V. Figure 12 demonstrates when Channel 1 is active, and when Channel 2 is active are shown in Figure 13 and Figure 14. A typical connection diagram for these conditions is illustrated in Figure 4.

Under-Voltage Lockout

The Under-Voltage Lockout is always monitoring the input voltage regardless of the active channel. Once VIN1 < VIN1_UVLO — VIN1_UVLO_HYS or VIN2< VIN2_UVLO — VIN2_UVLO_HYS an SLG59H1405V is turned off. To recover to normal operation both VIN[1, 2] should be higher than VIN[1, 2]_UVLO.

The following application scope-shots below demonstrates the Under-Voltage Lockout behavior of the SLG59H1405V device for VIN1 = 5 V step down to 3 V, VIN2= 12 V. A typical connection diagram for these conditions is illustrated in Figure 4.

In case of UVLO occurring while Channel 2 is selected by using SLG59H1405V, then after both input voltages are back to normal, Channel 2 should be turned on according to the sequence described in Power-Up Considerations section [1]. On Figure 15 the UVLO behavior while Channel 2 is selected is shown.

Please note, if this sequence is not followed, Channel 2 will be disabled, signals on EN2 will be ignored, and only Channel 1 will be active as shown in Figure 16.

Over current protection

Overcurrent protection is designed to protect the entire device from damage due to the excessive current of the connected device. Such protection significantly increases the fault tolerance of the entire device.

The output current is initially limited to the Active Current Limit specification given in the Electrical Characteristics Table 1. The current limiting circuit is very fast and responds within a few microseconds to sudden loads. When an overload is sensed, the current limiting circuit increases the FET resistance to keep the current from exceeding the Active Current Limit for TOCP_delay and then, if the overcurrent condition persists, the SLG59H1405V is latched-off. To release the part from latch-off state, both EN[1, 2] should be lower than EN[1, 2]_VIL.

The ACL level can be adjusted by choosing the appropriate ±1 %-tolerance RILIM1resistor value for Channel 1 and RILIM2 resistor value for Channel 2 and can be calculated by the following equations:

For RILIM1 ranging from 160 kΩ to 20 kΩ and for RILIM2 ranging from 75 kΩ to 20 kΩ

where:

RILIM[1, 2] = Resistor on ILIM[1, 2] pins, in kOhms (Ω)

Please note that if RILIM[1, 2] > 600 kΩ, ILIM[1, 2] pin is open, RILIM[1, 2] < 2 kΩ or ILIM[1, 2] pin is shorted to GND the ACL threshold will be IACL_VIN[1, 2] = 0.5 A.

During active current limit operation, the die temperature rises due to the increased FET resistance. If the die temperature exceeds the THERMON specification, the SLG59H1405V will also latch-off. To release the part from latch-off state both EN[1, 2] should be lower than EN[1, 2]_VIL.

The following application scope-shot below demonstrates the Over Current Protections behavior for Channel 1 of the SLG59H1405V device for VIN1 = 5 V, VIN2 = 12 V, with abnormal step load RLOAD = 1 Ω. A typical connection diagram for these conditions is illustrated in Figure 17.

Short-Circuit Protection

Short-circuit protection is designed to protect the entire device from damage caused by high short-circuit currents. A short circuit can occur as a result of the failure of the connected device or as a result of mechanical impact on the device. Such protection significantly increases the fault tolerance of the entire device.

Once output IVBUS current will hit the Short-Circuit Protection Threshold (ISCP) the SLG59H1405V will immediately shutdown, and then repower-up with lower current limit threshold that can be calculated by following equation:

where:

ILIM_SCP = VBUS Current Limit after Triggering VBUS Short Circuit ProtectionIACL_VIN[1, 2] = Active Current Limit threshold set by RILIM[1, 2]

This repower-up will last during TOCP_delay time and then SLG59H1405V will latch-off. To release the part from latch-off state both EN[1, 2] should be lower than EN[1, 2]_VIL.

The following application scope-shots below demonstrate the Short-circuit Protections behavior for the Channel 1 of the SLG59H1405V device for VIN1 = 5 V, VIN2 = 12 V, with abnormal step load RSHORT = 0.5 Ω. A typical connection diagram for these conditions is illustrated in Figure 19. For Channel 2 the Short-circuit Protections have the same behavior with corresponding ILIM_SCP current.

Conclusion

PowerMux is an indispensable device for the applications that uses several input powers supplies to a common output load. Using the Renesas SLG59H1405V device, which was specially designed for PowerMux applications, the process of controlling switching between different sources will be easier and safer, because SLG59H1405V IC has protection against over and under voltages as well as overcurrent and overtemperature and such solutions significantly increases system reliability.

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GreenPAK Blog
GreenPAK Blog

Written by GreenPAK Blog

Renesas’ Family of Programmable Mixed-Signal ASICs

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